silicon-on-insulator structures for nano-scaled devices

Olga V. Naumova ( naumova-AT-isp-DOT-nsc-DOT-ru.gif ), I. V. Antonova, V. P. Popov, Yu. V. Nastaushev, T. A. Gavrilova, L. V. Litvin, A.L. Aseev
Institute of Semiconductor Physics, 630090, Lavrentieva 13, Novosibirsk, Russia.

Semiconductor nano-scaled devices have attracted much attention due to their small size, low power consumption and unique functionality. These features indicate a tremendous potential for extremely thin silicon-on-insulator (SOI) devices. This SOI potential is applied in the present report for approbation of some elements of nanotechnology, investigation of the ultrathin SOI layers (5 – 50 nm), and fabrication of the MOSFET-like structures. Transport properties of the holes as well as the electrons induced in the same channels near bonded interface were investigated. The conductance oscillations attributed to the formation of tunnel barriers for one type of carrier werte found for ultrathin SOI layers. We used the SOI structures formed by wafer bonding and hydrogen slicing. A transformation of the hydrogen-related charge centers during technology processes is revealed to do a contribution to the flow of these processes and properties of the final nano-scaled structures. Properties of ultra thin SOI films separated from bulk silicon by thin oxide mentioned above and other related topics are discussed in this report.